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Reconfigurability and reliability of systolic wavefront arrays - Computers, IEEE Transactions on

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The document discusses the reconfigurability and reliability of systolic and wavefront arrays, focusing on fault tolerance in dynamic graphs. It introduces a graph model that accounts for failures in processing elements, switches, and connections. The authors define measures of reconfigurability and analyze their implications for maintaining reliable architectures. Key findings include the necessity for dynamic graphs to have a higher dimension than application graphs to achieve both local reconfigurability and reliability, highlighting the challenges in designing fault-tolerant systems.

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