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now we want to look at what happens when we try to do address translation in parallel with cache access we start out with a virtual page number and a page offset thatamp;#39;s your virtual address format then the translation look aside buffer translates the virtual page number to a physical page number and the page offset is still the same after the address translation for cache access purposes this physical address is divided into tag index and offset fields but donamp;#39;t confuse the block offset with the page offset notice in this example that the page offset is 12 bits so the page size would be 2 to the 12 or 4 kilobytes how much physical memory though is there well thatamp;#39;s determined by the length of a physical address which is 25 bits long and therefore there must be 2 to the 25th bytes of physical memory in this example now thatamp;#39;s horribly small by todayamp;#39;s standards but it serves for illustration if we want the cache to be indexed before address transl
