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this is an example of computing a CRC using a shift register arrangement in a shift register there is set of one bit registers that hold a single 0 1 value here the noted c0c1 C2 C3 C4 so this is a 5-bit register but the thing about it is it doesnt just hold the bits it allows moving in this case the bits from right to left for a CRC shift register each bit has an xor gate between the bits and were going to get to in a minute what gets extraord with them but the idea here is that the top bit of the data board goes into the x or gate all the way on the right and it feeds into c0 which is a single bit value c0 is xored with something and the result is C1 C1 is xored with something the result is C2 and so on up to C4 all these xores happen at the same time so theres a single value in c03 C4 theres a five bit value and then the xor gates compute the new value and then a Master Clock is cycle taking all the inputs and moving them into the registers simultaneously and youll see this ha